The microelectronic industry is continually striving to produce ever faster, smaller, and thinner microelectronic packages for use in various electronic products, including, but not limited to, computer server products and portable products, such as portable computers, electronic tablets, cellular phones, digital cameras, and the like.
Microelectronic packages generally include at least one microelectronic die attached to a microelectronic package substrate, such as an interposer. However, the microelectronic dice and the microelectronic package substrates, as well as other components within the microelectronic package, have differing coefficients of thermal expansion. The fundamental differences in the thermal expansion of these components may result in temperature dependent deformation or warpage of the microelectronic package, when the microelectronic package is being attached to an external substrate, such as a motherboard. This warpage may cause significant issues, such as non-contact opens, between the microelectronic package and the external substrate.
Such warpage can be mitigated by optimizing the microelectronic package architecture (e.g. modifying the stackup, increasing the microelectronic die or package size (footprint), increasing the microelectronic die or package thickness, and the like). However, these mitigation techniques may be restrictive when trying to integrate a higher degree of functionality at the package level, as will be understood to those skilled in the art. Another method may include attaching a stiffener to the microelectronic package. However, the use of a stiffener would increase the size of the microelectronic package in order to incorporate the same, which would be counter to the demand for ever smaller microelectronic packages and may increase the cost of the microelectronic package. As such, it is important to develop structures to mitigate warpage that will not restrict integration or increase the size of the microelectronic package.